1 /*
2 * CDDL HEADER START
3 *
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License (the "License").
6 * You may not use this file except in compliance with the License.
7 *
8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 * or http://www.opensolaris.org/os/licensing.
10 * See the License for the specific language governing permissions
11 * and limitations under the License.
12 *
13 * When distributing Covered Code, include this CDDL HEADER in each
14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 * If applicable, add the following below this CDDL HEADER, with the
16 * fields enclosed by brackets "[]" replaced with your own identifying
17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 *
19 * CDDL HEADER END
20 */
21
22 /*
23 * Copyright(c) 2007-2010 Intel Corporation. All rights reserved.
24 */
25
26 /*
27 * Copyright (c) 2008, 2010, Oracle and/or its affiliates. All rights reserved.
28 * Copyright 2012 Nexenta Systems, Inc. All rights reserved.
29 * Copyright 2016 OmniTI Computer Consulting, Inc. All rights reserved.
30 */
31
32 #include "ixgbe_sw.h"
33
34 /*
35 * Update driver private statistics.
36 */
37 static int
38 ixgbe_update_stats(kstat_t *ks, int rw)
39 {
40 ixgbe_t *ixgbe;
41 struct ixgbe_hw *hw;
42 ixgbe_stat_t *ixgbe_ks;
43 int i;
44
45 if (rw == KSTAT_WRITE)
46 return (EACCES);
47
48 ixgbe = (ixgbe_t *)ks->ks_private;
49 ixgbe_ks = (ixgbe_stat_t *)ks->ks_data;
50 hw = &ixgbe->hw;
51
52 mutex_enter(&ixgbe->gen_lock);
53
54 /*
55 * Basic information
56 */
57 ixgbe_ks->link_speed.value.ui64 = ixgbe->link_speed;
58 ixgbe_ks->reset_count.value.ui64 = ixgbe->reset_count;
59 ixgbe_ks->lroc.value.ui64 = ixgbe->lro_pkt_count;
60
61 #ifdef IXGBE_DEBUG
62 ixgbe_ks->rx_frame_error.value.ui64 = 0;
63 ixgbe_ks->rx_cksum_error.value.ui64 = 0;
64 ixgbe_ks->rx_exceed_pkt.value.ui64 = 0;
65 for (i = 0; i < ixgbe->num_rx_rings; i++) {
66 ixgbe_ks->rx_frame_error.value.ui64 +=
67 ixgbe->rx_rings[i].stat_frame_error;
68 ixgbe_ks->rx_cksum_error.value.ui64 +=
69 ixgbe->rx_rings[i].stat_cksum_error;
70 ixgbe_ks->rx_exceed_pkt.value.ui64 +=
71 ixgbe->rx_rings[i].stat_exceed_pkt;
72 }
73
74 ixgbe_ks->tx_overload.value.ui64 = 0;
75 ixgbe_ks->tx_fail_no_tbd.value.ui64 = 0;
76 ixgbe_ks->tx_fail_no_tcb.value.ui64 = 0;
77 ixgbe_ks->tx_fail_dma_bind.value.ui64 = 0;
78 ixgbe_ks->tx_reschedule.value.ui64 = 0;
79 for (i = 0; i < ixgbe->num_tx_rings; i++) {
80 ixgbe_ks->tx_overload.value.ui64 +=
81 ixgbe->tx_rings[i].stat_overload;
82 ixgbe_ks->tx_fail_no_tbd.value.ui64 +=
83 ixgbe->tx_rings[i].stat_fail_no_tbd;
84 ixgbe_ks->tx_fail_no_tcb.value.ui64 +=
85 ixgbe->tx_rings[i].stat_fail_no_tcb;
86 ixgbe_ks->tx_fail_dma_bind.value.ui64 +=
87 ixgbe->tx_rings[i].stat_fail_dma_bind;
88 ixgbe_ks->tx_reschedule.value.ui64 +=
89 ixgbe->tx_rings[i].stat_reschedule;
90 }
91 #endif
92
93 /*
94 * Hardware calculated statistics.
95 */
96 ixgbe_ks->gprc.value.ui64 = 0;
97 ixgbe_ks->gptc.value.ui64 = 0;
98 ixgbe_ks->tor.value.ui64 = 0;
99 ixgbe_ks->tot.value.ui64 = 0;
100 for (i = 0; i < 16; i++) {
101 ixgbe_ks->qprc[i].value.ui64 +=
102 IXGBE_READ_REG(hw, IXGBE_QPRC(i));
103 ixgbe_ks->gprc.value.ui64 += ixgbe_ks->qprc[i].value.ui64;
104 ixgbe_ks->qptc[i].value.ui64 +=
105 IXGBE_READ_REG(hw, IXGBE_QPTC(i));
106 ixgbe_ks->gptc.value.ui64 += ixgbe_ks->qptc[i].value.ui64;
107 ixgbe_ks->qbrc[i].value.ui64 +=
108 IXGBE_READ_REG(hw, IXGBE_QBRC(i));
109 ixgbe_ks->tor.value.ui64 += ixgbe_ks->qbrc[i].value.ui64;
110 switch (hw->mac.type) {
111 case ixgbe_mac_82598EB:
112 ixgbe_ks->qbtc[i].value.ui64 +=
113 IXGBE_READ_REG(hw, IXGBE_QBTC(i));
114 break;
115
116 case ixgbe_mac_82599EB:
117 case ixgbe_mac_X540:
118 case ixgbe_mac_X550:
119 case ixgbe_mac_X550EM_x:
120 ixgbe_ks->qbtc[i].value.ui64 +=
121 IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));
122 ixgbe_ks->qbtc[i].value.ui64 +=
123 ((uint64_t)((IXGBE_READ_REG(hw,
124 IXGBE_QBTC_H(i))) & 0xF) << 32);
125 break;
126
127 default:
128 break;
129 }
130 ixgbe_ks->tot.value.ui64 += ixgbe_ks->qbtc[i].value.ui64;
131 }
132 /*
133 * This is a Workaround:
134 * Currently h/w GORCH, GOTCH, TORH registers are not
135 * correctly implemented. We found that the values in
136 * these registers are same as those in corresponding
137 * *L registers (i.e. GORCL, GOTCL, and TORL). Here the
138 * gor and got stat data will not be retrieved through
139 * GORC{H/L} and GOTC{H/L} registers but be obtained by
140 * simply assigning tor/tot stat data, so the gor/got
141 * stat data will not be accurate.
142 */
143 ixgbe_ks->gor.value.ui64 = ixgbe_ks->tor.value.ui64;
144 ixgbe_ks->got.value.ui64 = ixgbe_ks->tot.value.ui64;
145
146 ixgbe_ks->prc64.value.ul += IXGBE_READ_REG(hw, IXGBE_PRC64);
147 ixgbe_ks->prc127.value.ul += IXGBE_READ_REG(hw, IXGBE_PRC127);
148 ixgbe_ks->prc255.value.ul += IXGBE_READ_REG(hw, IXGBE_PRC255);
149 ixgbe_ks->prc511.value.ul += IXGBE_READ_REG(hw, IXGBE_PRC511);
150 ixgbe_ks->prc1023.value.ul += IXGBE_READ_REG(hw, IXGBE_PRC1023);
151 ixgbe_ks->prc1522.value.ul += IXGBE_READ_REG(hw, IXGBE_PRC1522);
152 ixgbe_ks->ptc64.value.ul += IXGBE_READ_REG(hw, IXGBE_PTC64);
153 ixgbe_ks->ptc127.value.ul += IXGBE_READ_REG(hw, IXGBE_PTC127);
154 ixgbe_ks->ptc255.value.ul += IXGBE_READ_REG(hw, IXGBE_PTC255);
155 ixgbe_ks->ptc511.value.ul += IXGBE_READ_REG(hw, IXGBE_PTC511);
156 ixgbe_ks->ptc1023.value.ul += IXGBE_READ_REG(hw, IXGBE_PTC1023);
157 ixgbe_ks->ptc1522.value.ul += IXGBE_READ_REG(hw, IXGBE_PTC1522);
158
159 ixgbe_ks->mspdc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_MSPDC);
160 for (i = 0; i < 8; i++)
161 ixgbe_ks->mpc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_MPC(i));
162 ixgbe_ks->mlfc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_MLFC);
163 ixgbe_ks->mrfc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_MRFC);
164 ixgbe_ks->rlec.value.ui64 += IXGBE_READ_REG(hw, IXGBE_RLEC);
165 ixgbe_ks->lxontxc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_LXONTXC);
166 switch (hw->mac.type) {
167 case ixgbe_mac_82598EB:
168 ixgbe_ks->lxonrxc.value.ui64 += IXGBE_READ_REG(hw,
169 IXGBE_LXONRXC);
170 break;
171
172 case ixgbe_mac_82599EB:
173 case ixgbe_mac_X540:
174 case ixgbe_mac_X550:
175 case ixgbe_mac_X550EM_x:
176 ixgbe_ks->lxonrxc.value.ui64 += IXGBE_READ_REG(hw,
177 IXGBE_LXONRXCNT);
178 break;
179
180 default:
181 break;
182 }
183 ixgbe_ks->lxofftxc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
184 switch (hw->mac.type) {
185 case ixgbe_mac_82598EB:
186 ixgbe_ks->lxoffrxc.value.ui64 += IXGBE_READ_REG(hw,
187 IXGBE_LXOFFRXC);
188 break;
189
190 case ixgbe_mac_82599EB:
191 case ixgbe_mac_X540:
192 case ixgbe_mac_X550:
193 case ixgbe_mac_X550EM_x:
194 ixgbe_ks->lxoffrxc.value.ui64 += IXGBE_READ_REG(hw,
195 IXGBE_LXOFFRXCNT);
196 break;
197
198 default:
199 break;
200 }
201 ixgbe_ks->ruc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_RUC);
202 ixgbe_ks->rfc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_RFC);
203 ixgbe_ks->roc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_ROC);
204 ixgbe_ks->rjc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_RJC);
205
206 mutex_exit(&ixgbe->gen_lock);
207
208 if (ixgbe_check_acc_handle(ixgbe->osdep.reg_handle) != DDI_FM_OK)
209 ddi_fm_service_impact(ixgbe->dip, DDI_SERVICE_UNAFFECTED);
210
211 return (0);
212 }
213
214 /*
215 * Create and initialize the driver private statistics.
216 */
217 int
218 ixgbe_init_stats(ixgbe_t *ixgbe)
219 {
220 kstat_t *ks;
221 ixgbe_stat_t *ixgbe_ks;
222
223 /*
224 * Create and init kstat
225 */
226 ks = kstat_create(MODULE_NAME, ddi_get_instance(ixgbe->dip),
227 "statistics", "net", KSTAT_TYPE_NAMED,
228 sizeof (ixgbe_stat_t) / sizeof (kstat_named_t), 0);
229
230 if (ks == NULL) {
231 ixgbe_error(ixgbe,
232 "Could not create kernel statistics");
233 return (IXGBE_FAILURE);
234 }
235
236 ixgbe->ixgbe_ks = ks;
237
238 ixgbe_ks = (ixgbe_stat_t *)ks->ks_data;
239
240 /*
241 * Initialize all the statistics.
242 */
243 kstat_named_init(&ixgbe_ks->link_speed, "link_speed",
244 KSTAT_DATA_UINT64);
245 kstat_named_init(&ixgbe_ks->reset_count, "reset_count",
246 KSTAT_DATA_UINT64);
247
248 #ifdef IXGBE_DEBUG
249 kstat_named_init(&ixgbe_ks->rx_frame_error, "rx_frame_error",
250 KSTAT_DATA_UINT64);
251 kstat_named_init(&ixgbe_ks->rx_cksum_error, "rx_cksum_error",
252 KSTAT_DATA_UINT64);
253 kstat_named_init(&ixgbe_ks->rx_exceed_pkt, "rx_exceed_pkt",
254 KSTAT_DATA_UINT64);
255 kstat_named_init(&ixgbe_ks->tx_overload, "tx_overload",
256 KSTAT_DATA_UINT64);
257 kstat_named_init(&ixgbe_ks->tx_fail_no_tbd, "tx_fail_no_tbd",
258 KSTAT_DATA_UINT64);
259 kstat_named_init(&ixgbe_ks->tx_fail_no_tcb, "tx_fail_no_tcb",
260 KSTAT_DATA_UINT64);
261 kstat_named_init(&ixgbe_ks->tx_fail_dma_bind, "tx_fail_dma_bind",
262 KSTAT_DATA_UINT64);
263 kstat_named_init(&ixgbe_ks->tx_reschedule, "tx_reschedule",
264 KSTAT_DATA_UINT64);
265 #endif
266
267 kstat_named_init(&ixgbe_ks->gprc, "good_pkts_recvd",
268 KSTAT_DATA_UINT64);
269 kstat_named_init(&ixgbe_ks->gptc, "good_pkts_xmitd",
270 KSTAT_DATA_UINT64);
271 kstat_named_init(&ixgbe_ks->gor, "good_octets_recvd",
272 KSTAT_DATA_UINT64);
273 kstat_named_init(&ixgbe_ks->got, "good_octets_xmitd",
274 KSTAT_DATA_UINT64);
275 kstat_named_init(&ixgbe_ks->prc64, "pkts_recvd_( 64b)",
276 KSTAT_DATA_UINT64);
277 kstat_named_init(&ixgbe_ks->prc127, "pkts_recvd_( 65- 127b)",
278 KSTAT_DATA_UINT64);
279 kstat_named_init(&ixgbe_ks->prc255, "pkts_recvd_( 127- 255b)",
280 KSTAT_DATA_UINT64);
281 kstat_named_init(&ixgbe_ks->prc511, "pkts_recvd_( 256- 511b)",
282 KSTAT_DATA_UINT64);
283 kstat_named_init(&ixgbe_ks->prc1023, "pkts_recvd_( 511-1023b)",
284 KSTAT_DATA_UINT64);
285 kstat_named_init(&ixgbe_ks->prc1522, "pkts_recvd_(1024-1522b)",
286 KSTAT_DATA_UINT64);
287 kstat_named_init(&ixgbe_ks->ptc64, "pkts_xmitd_( 64b)",
288 KSTAT_DATA_UINT64);
289 kstat_named_init(&ixgbe_ks->ptc127, "pkts_xmitd_( 65- 127b)",
290 KSTAT_DATA_UINT64);
291 kstat_named_init(&ixgbe_ks->ptc255, "pkts_xmitd_( 128- 255b)",
292 KSTAT_DATA_UINT64);
293 kstat_named_init(&ixgbe_ks->ptc511, "pkts_xmitd_( 255- 511b)",
294 KSTAT_DATA_UINT64);
295 kstat_named_init(&ixgbe_ks->ptc1023, "pkts_xmitd_( 512-1023b)",
296 KSTAT_DATA_UINT64);
297 kstat_named_init(&ixgbe_ks->ptc1522, "pkts_xmitd_(1024-1522b)",
298 KSTAT_DATA_UINT64);
299
300 kstat_named_init(&ixgbe_ks->qprc[0], "queue_pkts_recvd [ 0]",
301 KSTAT_DATA_UINT64);
302 kstat_named_init(&ixgbe_ks->qprc[1], "queue_pkts_recvd [ 1]",
303 KSTAT_DATA_UINT64);
304 kstat_named_init(&ixgbe_ks->qprc[2], "queue_pkts_recvd [ 2]",
305 KSTAT_DATA_UINT64);
306 kstat_named_init(&ixgbe_ks->qprc[3], "queue_pkts_recvd [ 3]",
307 KSTAT_DATA_UINT64);
308 kstat_named_init(&ixgbe_ks->qprc[4], "queue_pkts_recvd [ 4]",
309 KSTAT_DATA_UINT64);
310 kstat_named_init(&ixgbe_ks->qprc[5], "queue_pkts_recvd [ 5]",
311 KSTAT_DATA_UINT64);
312 kstat_named_init(&ixgbe_ks->qprc[6], "queue_pkts_recvd [ 6]",
313 KSTAT_DATA_UINT64);
314 kstat_named_init(&ixgbe_ks->qprc[7], "queue_pkts_recvd [ 7]",
315 KSTAT_DATA_UINT64);
316 kstat_named_init(&ixgbe_ks->qprc[8], "queue_pkts_recvd [ 8]",
317 KSTAT_DATA_UINT64);
318 kstat_named_init(&ixgbe_ks->qprc[9], "queue_pkts_recvd [ 9]",
319 KSTAT_DATA_UINT64);
320 kstat_named_init(&ixgbe_ks->qprc[10], "queue_pkts_recvd [10]",
321 KSTAT_DATA_UINT64);
322 kstat_named_init(&ixgbe_ks->qprc[11], "queue_pkts_recvd [11]",
323 KSTAT_DATA_UINT64);
324 kstat_named_init(&ixgbe_ks->qprc[12], "queue_pkts_recvd [12]",
325 KSTAT_DATA_UINT64);
326 kstat_named_init(&ixgbe_ks->qprc[13], "queue_pkts_recvd [13]",
327 KSTAT_DATA_UINT64);
328 kstat_named_init(&ixgbe_ks->qprc[14], "queue_pkts_recvd [14]",
329 KSTAT_DATA_UINT64);
330 kstat_named_init(&ixgbe_ks->qprc[15], "queue_pkts_recvd [15]",
331 KSTAT_DATA_UINT64);
332
333 kstat_named_init(&ixgbe_ks->qptc[0], "queue_pkts_xmitd [ 0]",
334 KSTAT_DATA_UINT64);
335 kstat_named_init(&ixgbe_ks->qptc[1], "queue_pkts_xmitd [ 1]",
336 KSTAT_DATA_UINT64);
337 kstat_named_init(&ixgbe_ks->qptc[2], "queue_pkts_xmitd [ 2]",
338 KSTAT_DATA_UINT64);
339 kstat_named_init(&ixgbe_ks->qptc[3], "queue_pkts_xmitd [ 3]",
340 KSTAT_DATA_UINT64);
341 kstat_named_init(&ixgbe_ks->qptc[4], "queue_pkts_xmitd [ 4]",
342 KSTAT_DATA_UINT64);
343 kstat_named_init(&ixgbe_ks->qptc[5], "queue_pkts_xmitd [ 5]",
344 KSTAT_DATA_UINT64);
345 kstat_named_init(&ixgbe_ks->qptc[6], "queue_pkts_xmitd [ 6]",
346 KSTAT_DATA_UINT64);
347 kstat_named_init(&ixgbe_ks->qptc[7], "queue_pkts_xmitd [ 7]",
348 KSTAT_DATA_UINT64);
349 kstat_named_init(&ixgbe_ks->qptc[8], "queue_pkts_xmitd [ 8]",
350 KSTAT_DATA_UINT64);
351 kstat_named_init(&ixgbe_ks->qptc[9], "queue_pkts_xmitd [ 9]",
352 KSTAT_DATA_UINT64);
353 kstat_named_init(&ixgbe_ks->qptc[10], "queue_pkts_xmitd [10]",
354 KSTAT_DATA_UINT64);
355 kstat_named_init(&ixgbe_ks->qptc[11], "queue_pkts_xmitd [11]",
356 KSTAT_DATA_UINT64);
357 kstat_named_init(&ixgbe_ks->qptc[12], "queue_pkts_xmitd [12]",
358 KSTAT_DATA_UINT64);
359 kstat_named_init(&ixgbe_ks->qptc[13], "queue_pkts_xmitd [13]",
360 KSTAT_DATA_UINT64);
361 kstat_named_init(&ixgbe_ks->qptc[14], "queue_pkts_xmitd [14]",
362 KSTAT_DATA_UINT64);
363 kstat_named_init(&ixgbe_ks->qptc[15], "queue_pkts_xmitd [15]",
364 KSTAT_DATA_UINT64);
365
366 kstat_named_init(&ixgbe_ks->qbrc[0], "queue_bytes_recvd [ 0]",
367 KSTAT_DATA_UINT64);
368 kstat_named_init(&ixgbe_ks->qbrc[1], "queue_bytes_recvd [ 1]",
369 KSTAT_DATA_UINT64);
370 kstat_named_init(&ixgbe_ks->qbrc[2], "queue_bytes_recvd [ 2]",
371 KSTAT_DATA_UINT64);
372 kstat_named_init(&ixgbe_ks->qbrc[3], "queue_bytes_recvd [ 3]",
373 KSTAT_DATA_UINT64);
374 kstat_named_init(&ixgbe_ks->qbrc[4], "queue_bytes_recvd [ 4]",
375 KSTAT_DATA_UINT64);
376 kstat_named_init(&ixgbe_ks->qbrc[5], "queue_bytes_recvd [ 5]",
377 KSTAT_DATA_UINT64);
378 kstat_named_init(&ixgbe_ks->qbrc[6], "queue_bytes_recvd [ 6]",
379 KSTAT_DATA_UINT64);
380 kstat_named_init(&ixgbe_ks->qbrc[7], "queue_bytes_recvd [ 7]",
381 KSTAT_DATA_UINT64);
382 kstat_named_init(&ixgbe_ks->qbrc[8], "queue_bytes_recvd [ 8]",
383 KSTAT_DATA_UINT64);
384 kstat_named_init(&ixgbe_ks->qbrc[9], "queue_bytes_recvd [ 9]",
385 KSTAT_DATA_UINT64);
386 kstat_named_init(&ixgbe_ks->qbrc[10], "queue_bytes_recvd [10]",
387 KSTAT_DATA_UINT64);
388 kstat_named_init(&ixgbe_ks->qbrc[11], "queue_bytes_recvd [11]",
389 KSTAT_DATA_UINT64);
390 kstat_named_init(&ixgbe_ks->qbrc[12], "queue_bytes_recvd [12]",
391 KSTAT_DATA_UINT64);
392 kstat_named_init(&ixgbe_ks->qbrc[13], "queue_bytes_recvd [13]",
393 KSTAT_DATA_UINT64);
394 kstat_named_init(&ixgbe_ks->qbrc[14], "queue_bytes_recvd [14]",
395 KSTAT_DATA_UINT64);
396 kstat_named_init(&ixgbe_ks->qbrc[15], "queue_bytes_recvd [15]",
397 KSTAT_DATA_UINT64);
398
399 kstat_named_init(&ixgbe_ks->qbtc[0], "queue_bytes_xmitd [ 0]",
400 KSTAT_DATA_UINT64);
401 kstat_named_init(&ixgbe_ks->qbtc[1], "queue_bytes_xmitd [ 1]",
402 KSTAT_DATA_UINT64);
403 kstat_named_init(&ixgbe_ks->qbtc[2], "queue_bytes_xmitd [ 2]",
404 KSTAT_DATA_UINT64);
405 kstat_named_init(&ixgbe_ks->qbtc[3], "queue_bytes_xmitd [ 3]",
406 KSTAT_DATA_UINT64);
407 kstat_named_init(&ixgbe_ks->qbtc[4], "queue_bytes_xmitd [ 4]",
408 KSTAT_DATA_UINT64);
409 kstat_named_init(&ixgbe_ks->qbtc[5], "queue_bytes_xmitd [ 5]",
410 KSTAT_DATA_UINT64);
411 kstat_named_init(&ixgbe_ks->qbtc[6], "queue_bytes_xmitd [ 6]",
412 KSTAT_DATA_UINT64);
413 kstat_named_init(&ixgbe_ks->qbtc[7], "queue_bytes_xmitd [ 7]",
414 KSTAT_DATA_UINT64);
415 kstat_named_init(&ixgbe_ks->qbtc[8], "queue_bytes_xmitd [ 8]",
416 KSTAT_DATA_UINT64);
417 kstat_named_init(&ixgbe_ks->qbtc[9], "queue_bytes_xmitd [ 9]",
418 KSTAT_DATA_UINT64);
419 kstat_named_init(&ixgbe_ks->qbtc[10], "queue_bytes_xmitd [10]",
420 KSTAT_DATA_UINT64);
421 kstat_named_init(&ixgbe_ks->qbtc[11], "queue_bytes_xmitd [11]",
422 KSTAT_DATA_UINT64);
423 kstat_named_init(&ixgbe_ks->qbtc[12], "queue_bytes_xmitd [12]",
424 KSTAT_DATA_UINT64);
425 kstat_named_init(&ixgbe_ks->qbtc[13], "queue_bytes_xmitd [13]",
426 KSTAT_DATA_UINT64);
427 kstat_named_init(&ixgbe_ks->qbtc[14], "queue_bytes_xmitd [14]",
428 KSTAT_DATA_UINT64);
429 kstat_named_init(&ixgbe_ks->qbtc[15], "queue_bytes_xmitd [15]",
430 KSTAT_DATA_UINT64);
431
432 kstat_named_init(&ixgbe_ks->mspdc, "mac_short_packet_discard",
433 KSTAT_DATA_UINT64);
434 kstat_named_init(&ixgbe_ks->mpc, "missed_packets",
435 KSTAT_DATA_UINT64);
436 kstat_named_init(&ixgbe_ks->mlfc, "mac_local_fault",
437 KSTAT_DATA_UINT64);
438 kstat_named_init(&ixgbe_ks->mrfc, "mac_remote_fault",
439 KSTAT_DATA_UINT64);
440 kstat_named_init(&ixgbe_ks->rlec, "recv_length_err",
441 KSTAT_DATA_UINT64);
442 kstat_named_init(&ixgbe_ks->lxontxc, "link_xon_xmitd",
443 KSTAT_DATA_UINT64);
444 kstat_named_init(&ixgbe_ks->lxonrxc, "link_xon_recvd",
445 KSTAT_DATA_UINT64);
446 kstat_named_init(&ixgbe_ks->lxofftxc, "link_xoff_xmitd",
447 KSTAT_DATA_UINT64);
448 kstat_named_init(&ixgbe_ks->lxoffrxc, "link_xoff_recvd",
449 KSTAT_DATA_UINT64);
450 kstat_named_init(&ixgbe_ks->ruc, "recv_undersize",
451 KSTAT_DATA_UINT64);
452 kstat_named_init(&ixgbe_ks->rfc, "recv_fragment",
453 KSTAT_DATA_UINT64);
454 kstat_named_init(&ixgbe_ks->roc, "recv_oversize",
455 KSTAT_DATA_UINT64);
456 kstat_named_init(&ixgbe_ks->rjc, "recv_jabber",
457 KSTAT_DATA_UINT64);
458 kstat_named_init(&ixgbe_ks->rnbc, "recv_no_buffer",
459 KSTAT_DATA_UINT64);
460 kstat_named_init(&ixgbe_ks->lroc, "lro_pkt_count",
461 KSTAT_DATA_UINT64);
462 /*
463 * Function to provide kernel stat update on demand
464 */
465 ks->ks_update = ixgbe_update_stats;
466
467 ks->ks_private = (void *)ixgbe;
468
469 /*
470 * Add kstat to systems kstat chain
471 */
472 kstat_install(ks);
473
474 return (IXGBE_SUCCESS);
475 }
476
477 /*
478 * Retrieve a value for one of the statistics.
479 */
480 int
481 ixgbe_m_stat(void *arg, uint_t stat, uint64_t *val)
482 {
483 ixgbe_t *ixgbe = (ixgbe_t *)arg;
484 struct ixgbe_hw *hw = &ixgbe->hw;
485 ixgbe_stat_t *ixgbe_ks;
486 int i;
487 ixgbe_link_speed speeds = 0;
488
489 ixgbe_ks = (ixgbe_stat_t *)ixgbe->ixgbe_ks->ks_data;
490
491 mutex_enter(&ixgbe->gen_lock);
492
493 /*
494 * We cannot always rely on the common code maintaining
495 * hw->phy.speeds_supported, therefore we fall back to use the recorded
496 * supported speeds which were obtained during instance init in
497 * ixgbe_init_params().
498 */
499 speeds = hw->phy.speeds_supported;
500 if (speeds == 0)
501 speeds = ixgbe->speeds_supported;
502
503 if (ixgbe->ixgbe_state & IXGBE_SUSPENDED) {
504 mutex_exit(&ixgbe->gen_lock);
505 return (ECANCELED);
506 }
507
508 switch (stat) {
509 case MAC_STAT_IFSPEED:
510 *val = ixgbe->link_speed * 1000000ull;
511 break;
512
513 case MAC_STAT_MULTIRCV:
514 ixgbe_ks->mprc.value.ui64 +=
515 IXGBE_READ_REG(hw, IXGBE_MPRC);
516 *val = ixgbe_ks->mprc.value.ui64;
517 break;
518
519 case MAC_STAT_BRDCSTRCV:
520 ixgbe_ks->bprc.value.ui64 +=
521 IXGBE_READ_REG(hw, IXGBE_BPRC);
522 *val = ixgbe_ks->bprc.value.ui64;
523 break;
524
525 case MAC_STAT_MULTIXMT:
526 ixgbe_ks->mptc.value.ui64 +=
527 IXGBE_READ_REG(hw, IXGBE_MPTC);
528 *val = ixgbe_ks->mptc.value.ui64;
529 break;
530
531 case MAC_STAT_BRDCSTXMT:
532 ixgbe_ks->bptc.value.ui64 +=
533 IXGBE_READ_REG(hw, IXGBE_BPTC);
534 *val = ixgbe_ks->bptc.value.ui64;
535 break;
536
537 case MAC_STAT_NORCVBUF:
538 for (i = 0; i < 8; i++) {
539 ixgbe_ks->rnbc.value.ui64 +=
540 IXGBE_READ_REG(hw, IXGBE_RNBC(i));
541 }
542 *val = ixgbe_ks->rnbc.value.ui64;
543 break;
544
545 case MAC_STAT_IERRORS:
546 ixgbe_ks->crcerrs.value.ui64 +=
547 IXGBE_READ_REG(hw, IXGBE_CRCERRS);
548 ixgbe_ks->illerrc.value.ui64 +=
549 IXGBE_READ_REG(hw, IXGBE_ILLERRC);
550 ixgbe_ks->errbc.value.ui64 +=
551 IXGBE_READ_REG(hw, IXGBE_ERRBC);
552 ixgbe_ks->rlec.value.ui64 +=
553 IXGBE_READ_REG(hw, IXGBE_RLEC);
554 *val = ixgbe_ks->crcerrs.value.ui64 +
555 ixgbe_ks->illerrc.value.ui64 +
556 ixgbe_ks->errbc.value.ui64 +
557 ixgbe_ks->rlec.value.ui64;
558 break;
559
560 case MAC_STAT_RBYTES:
561 ixgbe_ks->tor.value.ui64 = 0;
562 for (i = 0; i < 16; i++) {
563 ixgbe_ks->qbrc[i].value.ui64 +=
564 IXGBE_READ_REG(hw, IXGBE_QBRC(i));
565 ixgbe_ks->tor.value.ui64 +=
566 ixgbe_ks->qbrc[i].value.ui64;
567 }
568 *val = ixgbe_ks->tor.value.ui64;
569 break;
570
571 case MAC_STAT_OBYTES:
572 ixgbe_ks->tot.value.ui64 = 0;
573 for (i = 0; i < 16; i++) {
574 switch (hw->mac.type) {
575 case ixgbe_mac_82598EB:
576 ixgbe_ks->qbtc[i].value.ui64 +=
577 IXGBE_READ_REG(hw, IXGBE_QBTC(i));
578 break;
579
580 case ixgbe_mac_82599EB:
581 case ixgbe_mac_X540:
582 case ixgbe_mac_X550:
583 case ixgbe_mac_X550EM_x:
584 ixgbe_ks->qbtc[i].value.ui64 +=
585 IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));
586 ixgbe_ks->qbtc[i].value.ui64 +=
587 ((uint64_t)((IXGBE_READ_REG(hw,
588 IXGBE_QBTC_H(i))) & 0xF) << 32);
589 break;
590
591 default:
592 break;
593 }
594 ixgbe_ks->tot.value.ui64 +=
595 ixgbe_ks->qbtc[i].value.ui64;
596 }
597 *val = ixgbe_ks->tot.value.ui64;
598 break;
599
600 case MAC_STAT_IPACKETS:
601 ixgbe_ks->tpr.value.ui64 +=
602 IXGBE_READ_REG(hw, IXGBE_TPR);
603 *val = ixgbe_ks->tpr.value.ui64;
604 break;
605
606 case MAC_STAT_OPACKETS:
607 ixgbe_ks->tpt.value.ui64 +=
608 IXGBE_READ_REG(hw, IXGBE_TPT);
609 *val = ixgbe_ks->tpt.value.ui64;
610 break;
611
612 /* RFC 1643 stats */
613 case ETHER_STAT_FCS_ERRORS:
614 ixgbe_ks->crcerrs.value.ui64 +=
615 IXGBE_READ_REG(hw, IXGBE_CRCERRS);
616 *val = ixgbe_ks->crcerrs.value.ui64;
617 break;
618
619 case ETHER_STAT_TOOLONG_ERRORS:
620 ixgbe_ks->roc.value.ui64 +=
621 IXGBE_READ_REG(hw, IXGBE_ROC);
622 *val = ixgbe_ks->roc.value.ui64;
623 break;
624
625 case ETHER_STAT_MACRCV_ERRORS:
626 ixgbe_ks->crcerrs.value.ui64 +=
627 IXGBE_READ_REG(hw, IXGBE_CRCERRS);
628 ixgbe_ks->illerrc.value.ui64 +=
629 IXGBE_READ_REG(hw, IXGBE_ILLERRC);
630 ixgbe_ks->errbc.value.ui64 +=
631 IXGBE_READ_REG(hw, IXGBE_ERRBC);
632 ixgbe_ks->rlec.value.ui64 +=
633 IXGBE_READ_REG(hw, IXGBE_RLEC);
634 *val = ixgbe_ks->crcerrs.value.ui64 +
635 ixgbe_ks->illerrc.value.ui64 +
636 ixgbe_ks->errbc.value.ui64 +
637 ixgbe_ks->rlec.value.ui64;
638 break;
639
640 /* MII/GMII stats */
641 case ETHER_STAT_XCVR_ADDR:
642 /* The Internal PHY's MDI address for each MAC is 1 */
643 *val = 1;
644 break;
645
646 case ETHER_STAT_XCVR_ID:
647 *val = hw->phy.id;
648 break;
649
650 case ETHER_STAT_XCVR_INUSE:
651 switch (ixgbe->link_speed) {
652 case IXGBE_LINK_SPEED_1GB_FULL:
653 *val =
654 (hw->phy.media_type == ixgbe_media_type_copper) ?
655 XCVR_1000T : XCVR_1000X;
656 break;
657 case IXGBE_LINK_SPEED_100_FULL:
658 *val = (hw->phy.media_type == ixgbe_media_type_copper) ?
659 XCVR_100T2 : XCVR_100X;
660 break;
661 default:
662 *val = XCVR_NONE;
663 break;
664 }
665 break;
666
667 case ETHER_STAT_CAP_10GFDX:
668 *val = (speeds & IXGBE_LINK_SPEED_10GB_FULL) ? 1 : 0;
669 break;
670
671 case ETHER_STAT_CAP_5000FDX:
672 *val = (speeds & IXGBE_LINK_SPEED_5GB_FULL) ? 1 : 0;
673 break;
674
675 case ETHER_STAT_CAP_2500FDX:
676 *val = (speeds & IXGBE_LINK_SPEED_2_5GB_FULL) ? 1 : 0;
677 break;
678
679 case ETHER_STAT_CAP_1000FDX:
680 *val = (speeds & IXGBE_LINK_SPEED_1GB_FULL) ? 1 : 0;
681 break;
682
683 case ETHER_STAT_CAP_100FDX:
684 *val = (speeds & IXGBE_LINK_SPEED_100_FULL) ? 1 : 0;
685 break;
686
687 case ETHER_STAT_CAP_ASMPAUSE:
688 *val = ixgbe->param_asym_pause_cap;
689 break;
690
691 case ETHER_STAT_CAP_PAUSE:
692 *val = ixgbe->param_pause_cap;
693 break;
694
695 case ETHER_STAT_CAP_AUTONEG:
696 *val = 1;
697 break;
698
699 case ETHER_STAT_ADV_CAP_10GFDX:
700 *val = ixgbe->param_adv_10000fdx_cap;
701 break;
702
703 case ETHER_STAT_ADV_CAP_5000FDX:
704 *val = ixgbe->param_adv_5000fdx_cap;
705 break;
706
707 case ETHER_STAT_ADV_CAP_2500FDX:
708 *val = ixgbe->param_adv_2500fdx_cap;
709 break;
710
711 case ETHER_STAT_ADV_CAP_1000FDX:
712 *val = ixgbe->param_adv_1000fdx_cap;
713 break;
714
715 case ETHER_STAT_ADV_CAP_100FDX:
716 *val = ixgbe->param_adv_100fdx_cap;
717 break;
718
719 case ETHER_STAT_ADV_CAP_ASMPAUSE:
720 *val = ixgbe->param_adv_asym_pause_cap;
721 break;
722
723 case ETHER_STAT_ADV_CAP_PAUSE:
724 *val = ixgbe->param_adv_pause_cap;
725 break;
726
727 case ETHER_STAT_ADV_CAP_AUTONEG:
728 *val = ixgbe->param_adv_autoneg_cap;
729 break;
730
731 case ETHER_STAT_LP_CAP_10GFDX:
732 *val = ixgbe->param_lp_10000fdx_cap;
733 break;
734
735 case ETHER_STAT_LP_CAP_5000FDX:
736 *val = ixgbe->param_lp_5000fdx_cap;
737 break;
738
739 case ETHER_STAT_LP_CAP_2500FDX:
740 *val = ixgbe->param_lp_2500fdx_cap;
741 break;
742
743 case ETHER_STAT_LP_CAP_1000FDX:
744 *val = ixgbe->param_lp_1000fdx_cap;
745 break;
746
747 case ETHER_STAT_LP_CAP_100FDX:
748 *val = ixgbe->param_lp_100fdx_cap;
749 break;
750
751 case ETHER_STAT_LP_CAP_ASMPAUSE:
752 *val = ixgbe->param_lp_asym_pause_cap;
753 break;
754
755 case ETHER_STAT_LP_CAP_PAUSE:
756 *val = ixgbe->param_lp_pause_cap;
757 break;
758
759 case ETHER_STAT_LP_CAP_AUTONEG:
760 *val = ixgbe->param_lp_autoneg_cap;
761 break;
762
763 case ETHER_STAT_LINK_ASMPAUSE:
764 *val = ixgbe->param_asym_pause_cap;
765 break;
766
767 case ETHER_STAT_LINK_PAUSE:
768 *val = ixgbe->param_pause_cap;
769 break;
770
771 case ETHER_STAT_LINK_AUTONEG:
772 *val = ixgbe->param_adv_autoneg_cap;
773 break;
774
775 case ETHER_STAT_LINK_DUPLEX:
776 *val = ixgbe->link_duplex;
777 break;
778
779 case ETHER_STAT_TOOSHORT_ERRORS:
780 ixgbe_ks->ruc.value.ui64 +=
781 IXGBE_READ_REG(hw, IXGBE_RUC);
782 *val = ixgbe_ks->ruc.value.ui64;
783 break;
784
785 case ETHER_STAT_CAP_REMFAULT:
786 *val = ixgbe->param_rem_fault;
787 break;
788
789 case ETHER_STAT_ADV_REMFAULT:
790 *val = ixgbe->param_adv_rem_fault;
791 break;
792
793 case ETHER_STAT_LP_REMFAULT:
794 *val = ixgbe->param_lp_rem_fault;
795 break;
796
797 case ETHER_STAT_JABBER_ERRORS:
798 ixgbe_ks->rjc.value.ui64 +=
799 IXGBE_READ_REG(hw, IXGBE_RJC);
800 *val = ixgbe_ks->rjc.value.ui64;
801 break;
802
803 default:
804 mutex_exit(&ixgbe->gen_lock);
805 return (ENOTSUP);
806 }
807
808 mutex_exit(&ixgbe->gen_lock);
809
810 if (ixgbe_check_acc_handle(ixgbe->osdep.reg_handle) != DDI_FM_OK) {
811 ddi_fm_service_impact(ixgbe->dip, DDI_SERVICE_DEGRADED);
812 return (EIO);
813 }
814
815 return (0);
816 }
817
818 /*
819 * Retrieve a value for one of the statistics for a particular rx ring
820 */
821 int
822 ixgbe_rx_ring_stat(mac_ring_driver_t rh, uint_t stat, uint64_t *val)
823 {
824 ixgbe_rx_ring_t *rx_ring = (ixgbe_rx_ring_t *)rh;
825 ixgbe_t *ixgbe = rx_ring->ixgbe;
826
827 if (ixgbe->ixgbe_state & IXGBE_SUSPENDED) {
828 return (ECANCELED);
829 }
830
831 switch (stat) {
832 case MAC_STAT_RBYTES:
833 *val = rx_ring->stat_rbytes;
834 break;
835
836 case MAC_STAT_IPACKETS:
837 *val = rx_ring->stat_ipackets;
838 break;
839
840 default:
841 *val = 0;
842 return (ENOTSUP);
843 }
844
845 return (0);
846 }
847
848 /*
849 * Retrieve a value for one of the statistics for a particular tx ring
850 */
851 int
852 ixgbe_tx_ring_stat(mac_ring_driver_t rh, uint_t stat, uint64_t *val)
853 {
854 ixgbe_tx_ring_t *tx_ring = (ixgbe_tx_ring_t *)rh;
855 ixgbe_t *ixgbe = tx_ring->ixgbe;
856
857 if (ixgbe->ixgbe_state & IXGBE_SUSPENDED) {
858 return (ECANCELED);
859 }
860
861 switch (stat) {
862 case MAC_STAT_OBYTES:
863 *val = tx_ring->stat_obytes;
864 break;
865
866 case MAC_STAT_OPACKETS:
867 *val = tx_ring->stat_opackets;
868 break;
869
870 default:
871 *val = 0;
872 return (ENOTSUP);
873 }
874
875 return (0);
876 }