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6064 ixgbe needs X550 support

*** 24,33 **** --- 24,34 ---- */ /* * Copyright (c) 2008, 2010, Oracle and/or its affiliates. All rights reserved. * Copyright 2012 Nexenta Systems, Inc. All rights reserved. + * Copyright 2016 OmniTI Computer Consulting, Inc. All rights reserved. */ #include "ixgbe_sw.h" /*
*** 112,121 **** --- 113,124 ---- IXGBE_READ_REG(hw, IXGBE_QBTC(i)); break; case ixgbe_mac_82599EB: case ixgbe_mac_X540: + case ixgbe_mac_X550: + case ixgbe_mac_X550EM_x: ixgbe_ks->qbtc[i].value.ui64 += IXGBE_READ_REG(hw, IXGBE_QBTC_L(i)); ixgbe_ks->qbtc[i].value.ui64 += ((uint64_t)((IXGBE_READ_REG(hw, IXGBE_QBTC_H(i))) & 0xF) << 32);
*** 166,175 **** --- 169,180 ---- IXGBE_LXONRXC); break; case ixgbe_mac_82599EB: case ixgbe_mac_X540: + case ixgbe_mac_X550: + case ixgbe_mac_X550EM_x: ixgbe_ks->lxonrxc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT); break; default:
*** 182,191 **** --- 187,198 ---- IXGBE_LXOFFRXC); break; case ixgbe_mac_82599EB: case ixgbe_mac_X540: + case ixgbe_mac_X550: + case ixgbe_mac_X550EM_x: ixgbe_ks->lxoffrxc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT); break; default:
*** 475,489 **** --- 482,507 ---- { ixgbe_t *ixgbe = (ixgbe_t *)arg; struct ixgbe_hw *hw = &ixgbe->hw; ixgbe_stat_t *ixgbe_ks; int i; + ixgbe_link_speed speeds = 0; ixgbe_ks = (ixgbe_stat_t *)ixgbe->ixgbe_ks->ks_data; mutex_enter(&ixgbe->gen_lock); + /* + * We cannot always rely on the common code maintaining + * hw->phy.speeds_supported, therefore we fall back to use the recorded + * supported speeds which were obtained during instance init in + * ixgbe_init_params(). + */ + speeds = hw->phy.speeds_supported; + if (speeds == 0) + speeds = ixgbe->speeds_supported; + if (ixgbe->ixgbe_state & IXGBE_SUSPENDED) { mutex_exit(&ixgbe->gen_lock); return (ECANCELED); }
*** 559,568 **** --- 577,588 ---- IXGBE_READ_REG(hw, IXGBE_QBTC(i)); break; case ixgbe_mac_82599EB: case ixgbe_mac_X540: + case ixgbe_mac_X550: + case ixgbe_mac_X550EM_x: ixgbe_ks->qbtc[i].value.ui64 += IXGBE_READ_REG(hw, IXGBE_QBTC_L(i)); ixgbe_ks->qbtc[i].value.ui64 += ((uint64_t)((IXGBE_READ_REG(hw, IXGBE_QBTC_H(i))) & 0xF) << 32);
*** 643,661 **** break; } break; case ETHER_STAT_CAP_10GFDX: ! *val = 1; break; case ETHER_STAT_CAP_1000FDX: ! *val = 1; break; case ETHER_STAT_CAP_100FDX: ! *val = 1; break; case ETHER_STAT_CAP_ASMPAUSE: *val = ixgbe->param_asym_pause_cap; break; --- 663,689 ---- break; } break; case ETHER_STAT_CAP_10GFDX: ! *val = (speeds & IXGBE_LINK_SPEED_10GB_FULL) ? 1 : 0; break; + case ETHER_STAT_CAP_5000FDX: + *val = (speeds & IXGBE_LINK_SPEED_5GB_FULL) ? 1 : 0; + break; + + case ETHER_STAT_CAP_2500FDX: + *val = (speeds & IXGBE_LINK_SPEED_2_5GB_FULL) ? 1 : 0; + break; + case ETHER_STAT_CAP_1000FDX: ! *val = (speeds & IXGBE_LINK_SPEED_1GB_FULL) ? 1 : 0; break; case ETHER_STAT_CAP_100FDX: ! *val = (speeds & IXGBE_LINK_SPEED_100_FULL) ? 1 : 0; break; case ETHER_STAT_CAP_ASMPAUSE: *val = ixgbe->param_asym_pause_cap; break;
*** 670,679 **** --- 698,715 ---- case ETHER_STAT_ADV_CAP_10GFDX: *val = ixgbe->param_adv_10000fdx_cap; break; + case ETHER_STAT_ADV_CAP_5000FDX: + *val = ixgbe->param_adv_5000fdx_cap; + break; + + case ETHER_STAT_ADV_CAP_2500FDX: + *val = ixgbe->param_adv_2500fdx_cap; + break; + case ETHER_STAT_ADV_CAP_1000FDX: *val = ixgbe->param_adv_1000fdx_cap; break; case ETHER_STAT_ADV_CAP_100FDX:
*** 694,703 **** --- 730,747 ---- case ETHER_STAT_LP_CAP_10GFDX: *val = ixgbe->param_lp_10000fdx_cap; break; + case ETHER_STAT_LP_CAP_5000FDX: + *val = ixgbe->param_lp_5000fdx_cap; + break; + + case ETHER_STAT_LP_CAP_2500FDX: + *val = ixgbe->param_lp_2500fdx_cap; + break; + case ETHER_STAT_LP_CAP_1000FDX: *val = ixgbe->param_lp_1000fdx_cap; break; case ETHER_STAT_LP_CAP_100FDX: