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6064 ixgbe needs X550 support

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          --- old/usr/src/uts/common/io/ixgbe/core/ixgbe_api.h
          +++ new/usr/src/uts/common/io/ixgbe/core/ixgbe_api.h
   1    1  /******************************************************************************
   2    2  
   3      -  Copyright (c) 2001-2012, Intel Corporation 
        3 +  Copyright (c) 2001-2015, Intel Corporation 
   4    4    All rights reserved.
   5    5    
   6    6    Redistribution and use in source and binary forms, with or without 
   7    7    modification, are permitted provided that the following conditions are met:
   8    8    
   9    9     1. Redistributions of source code must retain the above copyright notice, 
  10   10        this list of conditions and the following disclaimer.
  11   11    
  12   12     2. Redistributions in binary form must reproduce the above copyright 
  13   13        notice, this list of conditions and the following disclaimer in the 
↓ open down ↓ 9 lines elided ↑ open up ↑
  23   23    ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 
  24   24    LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 
  25   25    CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 
  26   26    SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
  27   27    INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 
  28   28    CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
  29   29    ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  30   30    POSSIBILITY OF SUCH DAMAGE.
  31   31  
  32   32  ******************************************************************************/
  33      -/*$FreeBSD: src/sys/dev/ixgbe/ixgbe_api.h,v 1.14 2012/07/05 20:51:44 jfv Exp $*/
       33 +/*$FreeBSD$*/
  34   34  
  35   35  #ifndef _IXGBE_API_H_
  36   36  #define _IXGBE_API_H_
  37   37  
  38   38  #include "ixgbe_type.h"
  39   39  
       40 +void ixgbe_dcb_get_rtrup2tc(struct ixgbe_hw *hw, u8 *map);
       41 +
  40   42  s32 ixgbe_init_shared_code(struct ixgbe_hw *hw);
  41   43  
  42   44  extern s32 ixgbe_init_ops_82598(struct ixgbe_hw *hw);
  43   45  extern s32 ixgbe_init_ops_82599(struct ixgbe_hw *hw);
  44   46  extern s32 ixgbe_init_ops_X540(struct ixgbe_hw *hw);
       47 +extern s32 ixgbe_init_ops_X550(struct ixgbe_hw *hw);
       48 +extern s32 ixgbe_init_ops_X550EM(struct ixgbe_hw *hw);
  45   49  extern s32 ixgbe_init_ops_vf(struct ixgbe_hw *hw);
  46   50  
  47   51  s32 ixgbe_set_mac_type(struct ixgbe_hw *hw);
  48   52  s32 ixgbe_init_hw(struct ixgbe_hw *hw);
  49   53  s32 ixgbe_reset_hw(struct ixgbe_hw *hw);
  50   54  s32 ixgbe_start_hw(struct ixgbe_hw *hw);
  51   55  void ixgbe_enable_relaxed_ordering(struct ixgbe_hw *hw);
  52   56  s32 ixgbe_clear_hw_cntrs(struct ixgbe_hw *hw);
  53   57  enum ixgbe_media_type ixgbe_get_media_type(struct ixgbe_hw *hw);
  54   58  s32 ixgbe_get_mac_addr(struct ixgbe_hw *hw, u8 *mac_addr);
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  60   64  s32 ixgbe_read_pba_string(struct ixgbe_hw *hw, u8 *pba_num, u32 pba_num_size);
  61   65  
  62   66  s32 ixgbe_identify_phy(struct ixgbe_hw *hw);
  63   67  s32 ixgbe_reset_phy(struct ixgbe_hw *hw);
  64   68  s32 ixgbe_read_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
  65   69                         u16 *phy_data);
  66   70  s32 ixgbe_write_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
  67   71                          u16 phy_data);
  68   72  
  69   73  s32 ixgbe_setup_phy_link(struct ixgbe_hw *hw);
       74 +s32 ixgbe_setup_internal_phy(struct ixgbe_hw *hw);
  70   75  s32 ixgbe_check_phy_link(struct ixgbe_hw *hw,
  71   76                           ixgbe_link_speed *speed,
  72   77                           bool *link_up);
  73   78  s32 ixgbe_setup_phy_link_speed(struct ixgbe_hw *hw,
  74   79                                 ixgbe_link_speed speed,
  75      -                               bool autoneg,
  76   80                                 bool autoneg_wait_to_complete);
       81 +s32 ixgbe_set_phy_power(struct ixgbe_hw *, bool on);
  77   82  void ixgbe_disable_tx_laser(struct ixgbe_hw *hw);
  78   83  void ixgbe_enable_tx_laser(struct ixgbe_hw *hw);
  79   84  void ixgbe_flap_tx_laser(struct ixgbe_hw *hw);
  80   85  s32 ixgbe_setup_link(struct ixgbe_hw *hw, ixgbe_link_speed speed,
  81      -                     bool autoneg, bool autoneg_wait_to_complete);
       86 +                     bool autoneg_wait_to_complete);
       87 +s32 ixgbe_setup_mac_link(struct ixgbe_hw *hw, ixgbe_link_speed speed,
       88 +                         bool autoneg_wait_to_complete);
  82   89  s32 ixgbe_check_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
  83   90                       bool *link_up, bool link_up_wait_to_complete);
  84   91  s32 ixgbe_get_link_capabilities(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
  85   92                                  bool *autoneg);
  86   93  s32 ixgbe_led_on(struct ixgbe_hw *hw, u32 index);
  87   94  s32 ixgbe_led_off(struct ixgbe_hw *hw, u32 index);
  88   95  s32 ixgbe_blink_led_start(struct ixgbe_hw *hw, u32 index);
  89   96  s32 ixgbe_blink_led_stop(struct ixgbe_hw *hw, u32 index);
  90   97  
  91   98  s32 ixgbe_init_eeprom_params(struct ixgbe_hw *hw);
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 115  122                                bool clear);
 116  123  void ixgbe_add_uc_addr(struct ixgbe_hw *hw, u8 *addr_list, u32 vmdq);
 117  124  s32 ixgbe_enable_mc(struct ixgbe_hw *hw);
 118  125  s32 ixgbe_disable_mc(struct ixgbe_hw *hw);
 119  126  s32 ixgbe_clear_vfta(struct ixgbe_hw *hw);
 120  127  s32 ixgbe_set_vfta(struct ixgbe_hw *hw, u32 vlan,
 121  128                     u32 vind, bool vlan_on);
 122  129  s32 ixgbe_set_vlvf(struct ixgbe_hw *hw, u32 vlan, u32 vind,
 123  130                     bool vlan_on, bool *vfta_changed);
 124  131  s32 ixgbe_fc_enable(struct ixgbe_hw *hw);
      132 +s32 ixgbe_setup_fc(struct ixgbe_hw *hw);
 125  133  s32 ixgbe_set_fw_drv_ver(struct ixgbe_hw *hw, u8 maj, u8 min, u8 build,
 126  134                           u8 ver);
 127  135  void ixgbe_set_mta(struct ixgbe_hw *hw, u8 *mc_addr);
 128  136  s32 ixgbe_get_phy_firmware_version(struct ixgbe_hw *hw,
 129  137                                     u16 *firmware_version);
 130  138  s32 ixgbe_read_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 *val);
 131  139  s32 ixgbe_write_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 val);
 132  140  s32 ixgbe_init_uta_tables(struct ixgbe_hw *hw);
 133  141  s32 ixgbe_read_i2c_eeprom(struct ixgbe_hw *hw, u8 byte_offset, u8 *eeprom_data);
 134  142  u32 ixgbe_get_supported_physical_layer(struct ixgbe_hw *hw);
 135  143  s32 ixgbe_enable_rx_dma(struct ixgbe_hw *hw, u32 regval);
 136  144  s32 ixgbe_disable_sec_rx_path(struct ixgbe_hw *hw);
 137  145  s32 ixgbe_enable_sec_rx_path(struct ixgbe_hw *hw);
      146 +s32 ixgbe_mng_fw_enabled(struct ixgbe_hw *hw);
 138  147  s32 ixgbe_reinit_fdir_tables_82599(struct ixgbe_hw *hw);
 139  148  s32 ixgbe_init_fdir_signature_82599(struct ixgbe_hw *hw, u32 fdirctrl);
 140      -s32 ixgbe_init_fdir_perfect_82599(struct ixgbe_hw *hw, u32 fdirctrl);
 141      -s32 ixgbe_fdir_add_signature_filter_82599(struct ixgbe_hw *hw,
 142      -                                          union ixgbe_atr_hash_dword input,
 143      -                                          union ixgbe_atr_hash_dword common,
 144      -                                          u8 queue);
      149 +s32 ixgbe_init_fdir_perfect_82599(struct ixgbe_hw *hw, u32 fdirctrl,
      150 +                                        bool cloud_mode);
      151 +void ixgbe_fdir_add_signature_filter_82599(struct ixgbe_hw *hw,
      152 +                                           union ixgbe_atr_hash_dword input,
      153 +                                           union ixgbe_atr_hash_dword common,
      154 +                                           u8 queue);
 145  155  s32 ixgbe_fdir_set_input_mask_82599(struct ixgbe_hw *hw,
 146      -                                    union ixgbe_atr_input *input_mask);
      156 +                                    union ixgbe_atr_input *input_mask, bool cloud_mode);
 147  157  s32 ixgbe_fdir_write_perfect_filter_82599(struct ixgbe_hw *hw,
 148  158                                            union ixgbe_atr_input *input,
 149      -                                          u16 soft_id, u8 queue);
      159 +                                          u16 soft_id, u8 queue, bool cloud_mode);
 150  160  s32 ixgbe_fdir_erase_perfect_filter_82599(struct ixgbe_hw *hw,
 151  161                                            union ixgbe_atr_input *input,
 152  162                                            u16 soft_id);
 153  163  s32 ixgbe_fdir_add_perfect_filter_82599(struct ixgbe_hw *hw,
 154  164                                          union ixgbe_atr_input *input,
 155  165                                          union ixgbe_atr_input *mask,
 156  166                                          u16 soft_id,
 157      -                                        u8 queue);
      167 +                                        u8 queue,
      168 +                                        bool cloud_mode);
 158  169  void ixgbe_atr_compute_perfect_hash_82599(union ixgbe_atr_input *input,
 159  170                                            union ixgbe_atr_input *mask);
 160  171  u32 ixgbe_atr_compute_sig_hash_82599(union ixgbe_atr_hash_dword input,
 161  172                                       union ixgbe_atr_hash_dword common);
      173 +bool ixgbe_verify_lesm_fw_enabled_82599(struct ixgbe_hw *hw);
 162  174  s32 ixgbe_read_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,
 163  175                          u8 *data);
      176 +s32 ixgbe_read_i2c_byte_unlocked(struct ixgbe_hw *hw, u8 byte_offset,
      177 +                                 u8 dev_addr, u8 *data);
      178 +s32 ixgbe_read_i2c_combined(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 *val);
      179 +s32 ixgbe_read_i2c_combined_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg,
      180 +                                     u16 *val);
 164  181  s32 ixgbe_write_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,
 165  182                           u8 data);
      183 +void ixgbe_set_fdir_drop_queue_82599(struct ixgbe_hw *hw, u8 dropqueue);
      184 +s32 ixgbe_write_i2c_byte_unlocked(struct ixgbe_hw *hw, u8 byte_offset,
      185 +                                  u8 dev_addr, u8 data);
      186 +s32 ixgbe_write_i2c_combined(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 val);
      187 +s32 ixgbe_write_i2c_combined_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg,
      188 +                                      u16 val);
 166  189  s32 ixgbe_write_i2c_eeprom(struct ixgbe_hw *hw, u8 byte_offset, u8 eeprom_data);
 167  190  s32 ixgbe_get_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr);
 168  191  s32 ixgbe_set_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr);
 169  192  s32 ixgbe_get_device_caps(struct ixgbe_hw *hw, u16 *device_caps);
 170      -s32 ixgbe_acquire_swfw_semaphore(struct ixgbe_hw *hw, u16 mask);
 171      -void ixgbe_release_swfw_semaphore(struct ixgbe_hw *hw, u16 mask);
      193 +s32 ixgbe_acquire_swfw_semaphore(struct ixgbe_hw *hw, u32 mask);
      194 +void ixgbe_release_swfw_semaphore(struct ixgbe_hw *hw, u32 mask);
 172  195  s32 ixgbe_get_wwn_prefix(struct ixgbe_hw *hw, u16 *wwnn_prefix,
 173  196                           u16 *wwpn_prefix);
 174  197  s32 ixgbe_get_fcoe_boot_status(struct ixgbe_hw *hw, u16 *bs);
      198 +s32 ixgbe_dmac_config(struct ixgbe_hw *hw);
      199 +s32 ixgbe_dmac_update_tcs(struct ixgbe_hw *hw);
      200 +s32 ixgbe_dmac_config_tcs(struct ixgbe_hw *hw);
      201 +s32 ixgbe_setup_eee(struct ixgbe_hw *hw, bool enable_eee);
      202 +void ixgbe_set_source_address_pruning(struct ixgbe_hw *hw, bool enable,
      203 +                                      unsigned int vf);
      204 +void ixgbe_set_ethertype_anti_spoofing(struct ixgbe_hw *hw, bool enable,
      205 +                                       int vf);
      206 +s32 ixgbe_read_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr,
      207 +                        u32 device_type, u32 *phy_data);
      208 +s32 ixgbe_write_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr,
      209 +                        u32 device_type, u32 phy_data);
      210 +void ixgbe_disable_mdd(struct ixgbe_hw *hw);
      211 +void ixgbe_enable_mdd(struct ixgbe_hw *hw);
      212 +void ixgbe_mdd_event(struct ixgbe_hw *hw, u32 *vf_bitmap);
      213 +void ixgbe_restore_mdd_vf(struct ixgbe_hw *hw, u32 vf);
      214 +s32 ixgbe_enter_lplu(struct ixgbe_hw *hw);
      215 +s32 ixgbe_handle_lasi(struct ixgbe_hw *hw);
      216 +void ixgbe_set_rate_select_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed);
      217 +void ixgbe_disable_rx(struct ixgbe_hw *hw);
      218 +void ixgbe_enable_rx(struct ixgbe_hw *hw);
 175  219  
 176  220  #endif /* _IXGBE_API_H_ */
    
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